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Embedding Sequential Circuits for their Polynomial Formal Verification

Language EnglishEnglish
E-book Adobe ePub DRM
Publishers Springer Vieweg, January 2026
As digital circuits are at the core of most of our everyday technologies, society heavily relies on... Full description
? points 245 b
101.11
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As digital circuits are at the core of most of our everyday technologies, society heavily relies on their precise and predictable behavior. However, this demand for correctness often clashes with the speed of today’s design workflows. Whereas a design can be proven to be free of errors based on formal methods, the required time and memory resources of this can often not be predicted. This conflict is addressed by Polynomial Formal Verification (PFV): By selecting adequate data structures and verification techniques, polynomial resource bounds can be proven for the entire procedure so that an efficient verification is guaranteed.This book adds to this field by applying PFV to circuits with storage elements, also known as sequential circuits. Counter circuits are verified using a polynomial number of steps, even though they have an exponential sequential depth. This is addressed from a theoretical and from a practical point of view.

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About the book

Full name Embedding Sequential Circuits for their Polynomial Formal Verification
Language English
Binding E-book - Adobe ePub DRM
Date of issue 2026
EAN 9783658501556
Libristo code 50332166
Publishers Springer Vieweg
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